The present application relates to liquid crystal display panels of the transverse electric field system, and particularly to liquid crystal display panels of the in-plane switching (IPS) mode and the fringe field switching (FFS) mode in which the surface of the array substrate is planarized and the occurrence of a burn-in phenomenon, displaying unevenness, and flicker is suppressed.
The liquid crystal display panel has features of lighter weight, smaller thickness, and lower power consumption compared with the cathode ray tube (CRT) and therefore is used as a display unit in many pieces of electronic apparatus. The liquid crystal display panel is to display an image by changing the orientation of liquid crystal molecules aligned along a predetermined direction by an electric field to thereby change the amount of light passing through the liquid crystal layer.
The method for applying the electric field to the liquid crystal layer of the liquid crystal display panel includes a method of the vertical electric field system and a method of the transverse electric field system. In the liquid crystal display panel of the vertical electric field system, an electric field along substantially the vertical direction is applied to liquid crystal molecules by a pair of electrodes sandwiching the liquid crystal layer. As the liquid crystal display panel of this vertical electric field system, liquid crystal display panels of the twisted nematic (TN) mode, the vertical alignment (VA) mode, the multi-domain vertical alignment (MVA) mode, the electrically controlled birefringence (ECB) mode, etc. are known.
In the liquid crystal display panel of the transverse electric field system, a pair of electrodes insulated from each other are provided on the internal surface side of one of a pair of substrates sandwiching the liquid crystal layer, and an electric field along substantially the lateral direction is applied to liquid crystal molecules. As the liquid crystal display panel of this transverse electric field system, a liquid crystal display panel of the IPS mode, in which the pair of electrodes do not overlap with each other in plan view, and a liquid crystal display panel of the FFS mode, in which the pair of electrodes overlap with each other in plan view, are known. The liquid crystal display panel of the transverse electric field system is increasingly used in recent years because it has an advantage that a wide viewing angle can be obtained.
As the IPS-mode liquid crystal display panel, a liquid crystal display panel in which the pair of electrodes are formed on the same layer is known as shown in Japanese Patent Laid-open No. 2005-084180 (Patent Document 1). In addition, a liquid crystal display panel in which an inter-electrode insulating film is formed between the pair of electrodes is known as shown in Japanese Patent Laid-open No. 2008-164958 (Patent Document 2). In both of the IPS-mode liquid crystal display panels, the pair of electrodes are formed into a comb-teeth shape and do not overlap with each other in plan view. Thus, both IPS-mode liquid crystal display panels have problems that the liquid crystal molecules located over the pixel electrode are not sufficiently driven and the aperture ratio and the transmittance are low.
On the other hand, as shown in Japanese Patent Laid-open No. 2009-036800, Japanese Patent Laid-open No. 2008-268841, and Japanese Patent Laid-open No. 2008-180928 (Patent Documents 3, 4, and 5, respectively), there have been developed FFS-mode liquid crystal display panels in which the pair of electrodes overlap with each other in plan view and slit apertures are provided in the upper electrode. In the FFS-mode liquid crystal display panel disclosed in Patent Document 3, the lower electrode is formed in the same layer as that of the scan line. Therefore, although a gate insulating film and a passivation film exist between the upper electrode and the lower electrode, there is a problem that the scan line and the upper electrode working as the pixel electrode are close to each other and thus an unnecessary electric field arises because both of the gate insulating film and the passivation film are a thin film. Furthermore, because the lower electrode working as the common electrode is so formed as to be separated for each pixel, wiring for the common electrode for each pixel is ensured by forming an opaque common line in parallel to the scan line and in the same layer as that of the scan line in such a way that part of the lower electrode overlaps with this common line. Therefore, there are problems that the aperture ratio is lowered and that a step is generated in the upper electrode at the position overlapping with the common line in plan view attributed to the overlapping of the common electrode with the common line and the alignment of liquid crystal molecules is disturbed at this step part.
In contrast, Patent Documents 4 and 5 disclose applications of FFS-mode liquid crystal display panels in which the layer over the thin film transistor (TFT) is planarized and an interlayer insulating film to separate the scan line from the pixel electrode is formed. In the FFS-mode liquid crystal display panels disclosed in Patent Documents 4 and 5, the common electrode is formed across all the pixels in the display area and this common electrode is connected to the common line in the peripheral part of the display area. Thus, the opaque common line for interconnecting the common electrodes is not formed for the pixels. Therefore, the FFS-mode liquid crystal display panels disclosed in Patent Documents 4 and 5 have features of higher aperture ratio and higher contrast compared with the FFS-mode liquid crystal display panel disclosed in Patent Documents 3.
Japanese Patent Laid-open No. 2008-096469 (Patent Document 6) also discloses the related art of the present application.